Chris Wilson c6df541c00 Revert "drm/i915: Avoid using PIPE_CONTROL on Ironlake" ...

Restore PIPE_CONTROL once again just for Ironlake, as it appears that
MI_USER_INTERRUPT does not have the same coherency guarantees, that is
on Ironlake the interrupt following a GPU write is not guaranteed to
arrive after the write is coherent from the CPU, as it does on the
other generations.

Reported-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reported-by: Shuang He <shuang.he@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32402
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

2010-12-15 10:15:25 +00:00

..

drm

Revert "drm/i915: Avoid using PIPE_CONTROL on Ironlake"

2010-12-15 10:15:25 +00:00

stub

drm/stub/Kconfig: fix Kconfig for stub driver.

2010-11-09 13:33:00 +10:00

vga

Merge branch 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl

2010-10-22 10:52:56 -07:00

Makefile

gpu: Add Intel GMA500(Poulsbo) Stub Driver

2010-10-26 11:00:13 +10:00