Matt Roper c5fa58146e drm/xe/xe2: Update context image layouts ...

Engine register state layout has changed a bit on Xe2.  We'll also
explicitly define a BCS layout to ensure BLIT_SWCTL and BLIT_CCTL are
included.

Bspec: 65182, 60184, 55793
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

2023-12-21 11:40:25 -05:00

..

drm

drm/xe/xe2: Update context image layouts

2023-12-21 11:40:25 -05:00

host1x

gpu: host1x: Correct allocated size for contexts

2023-10-11 22:52:44 +02:00

ipu-v3

Merge tag 'drm-next-2023-08-30' of git://anongit.freedesktop.org/drm/drm

2023-08-30 13:34:34 -07:00

trace

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vga

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Makefile

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