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A8XX GPUs have two sets of protect registers: 64 global slots and 16 pipe specific slots. The last-span-unbound feature is only available on pipe protect registers, and should always target pipe slot 15. This matches the downstream driver which hardcodes pipe slot 15 for all A8XX GPUs (GRAPHICS.LA.15.0.r1) and resolves protect errors on A810. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Signed-off-by: Alexander Koskovich <akoskovich@pm.me> Patchwork: https://patchwork.freedesktop.org/patch/728810/ Message-ID: <20260528-adreno-810-v7-5-7fe7fdd97fc2@pm.me> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>