Files
linux/drivers/usb/phy
Svyatoslav Ryhel e5b250214a usb: phy: tegra: parametrize PORTSC1 register offset
The PORTSC1 register has a different offset in Tegra20 compared to
Tegra30+, yet they share a crucial set of registers required for HSIC
functionality. Reflect this register offset change in the SoC config.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Link: https://patch.msgid.link/20260202080526.23487-5-clamor95@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-02-05 17:16:24 +01:00
..
2025-04-11 16:11:25 +02:00
2025-04-11 16:11:25 +02:00
2017-11-07 15:45:01 +01:00