mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-06-13 06:00:13 -04:00
The hwprobe vDSO data for some keys, like MISALIGNED_VECTOR_PERF,
is determined by an asynchronous kthread. This can create a race
condition where the kthread finishes after the vDSO data has
already been populated, causing userspace to read stale values.
To fix this race, a new 'ready' flag is added to the vDSO data,
initialized to 'false' during arch_initcall_sync. This flag is
checked by both the vDSO's user-space code and the riscv_hwprobe
syscall. The syscall serves as a one-time gate, using a completion
to wait for any pending probes before populating the data and
setting the flag to 'true', thus ensuring userspace reads fresh
values on its first request.
Reported-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Closes: https://lore.kernel.org/linux-riscv/760d637b-b13b-4518-b6bf-883d55d44e7f@irq.a4lg.com/
Fixes: e7c9d66e31 ("RISC-V: Report vector unaligned access speed hwprobe")
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: stable@vger.kernel.org
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Co-developed-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Jingwei Wang <wangjingwei@iscas.ac.cn>
Link: https://lore.kernel.org/r/20250811142035.105820-1-wangjingwei@iscas.ac.cn
[pjw@kernel.org: fix checkpatch issues]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
|
/*
|
|
* Copyright 2023-2024 Rivos, Inc
|
|
*/
|
|
|
|
#ifndef _ASM_HWPROBE_H
|
|
#define _ASM_HWPROBE_H
|
|
|
|
#include <uapi/asm/hwprobe.h>
|
|
|
|
#define RISCV_HWPROBE_MAX_KEY 14
|
|
|
|
static inline bool riscv_hwprobe_key_is_valid(__s64 key)
|
|
{
|
|
return key >= 0 && key <= RISCV_HWPROBE_MAX_KEY;
|
|
}
|
|
|
|
static inline bool hwprobe_key_is_bitmask(__s64 key)
|
|
{
|
|
switch (key) {
|
|
case RISCV_HWPROBE_KEY_BASE_BEHAVIOR:
|
|
case RISCV_HWPROBE_KEY_IMA_EXT_0:
|
|
case RISCV_HWPROBE_KEY_CPUPERF_0:
|
|
case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0:
|
|
case RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0:
|
|
case RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0:
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static inline bool riscv_hwprobe_pair_cmp(struct riscv_hwprobe *pair,
|
|
struct riscv_hwprobe *other_pair)
|
|
{
|
|
if (pair->key != other_pair->key)
|
|
return false;
|
|
|
|
if (hwprobe_key_is_bitmask(pair->key))
|
|
return (pair->value & other_pair->value) == other_pair->value;
|
|
|
|
return pair->value == other_pair->value;
|
|
}
|
|
|
|
#ifdef CONFIG_MMU
|
|
void riscv_hwprobe_register_async_probe(void);
|
|
void riscv_hwprobe_complete_async_probe(void);
|
|
#else
|
|
static inline void riscv_hwprobe_register_async_probe(void) {}
|
|
static inline void riscv_hwprobe_complete_async_probe(void) {}
|
|
#endif
|
|
#endif
|