Barry Song debeaf6c2d ARM: PRIMA2: delete redundant codes to restore LATCHED when timer resumes ...

The only way to write LATCHED registers to write LATCH_BIT to LATCH register,
that will latch COUNTER into LATCHED.e.g.
writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base +
	SIRFSOC_TIMER_LATCH);

Writing values to LATCHED registers directly is useless at all.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

2012-08-02 10:05:27 -07:00

..

include/mach

PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII

2012-07-02 10:59:07 +08:00

clock.c

ARM: CSR: clock: Fix indentation

2011-10-01 09:40:44 +08:00

common.h

ARM: prima2: use machine specific hook for late init

2012-05-08 20:36:22 +08:00

irq.c

ARM: PRIMA2: fix irq domain size and IRQ mask of internal interrupt controller

2012-05-16 21:52:13 -07:00

l2x0.c

ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII

2011-10-24 02:54:21 -07:00

lluart.c

ARM: CSR: mapping early DEBUG_LL uart

2011-07-09 07:20:51 +08:00

Makefile

ARM: CSR: PM: add sleep entry for SiRFprimaII

2011-09-21 23:25:59 +08:00

Makefile.boot

ARM: 7022/1: allow to detect conflicting zreladdrs

2011-10-17 09:12:40 +01:00

pm.c

ARM: prima2: use machine specific hook for late init

2012-05-08 20:36:22 +08:00

pm.h

ARM: CSR: PM: add sleep entry for SiRFprimaII

2011-09-21 23:25:59 +08:00

prima2.c

ARM: prima2: use machine specific hook for late init

2012-05-08 20:36:22 +08:00

rstc.c

ARM: restart: prima2: use new restart hook

2012-01-05 12:57:17 +00:00

rtciobrg.c

ARM: CSR: add rtc i/o bridge interface for SiRFprimaII

2011-09-11 09:17:53 +08:00

sleep.S

ARM: CSR: PM: add sleep entry for SiRFprimaII

2011-09-21 23:25:59 +08:00

timer.c

ARM: PRIMA2: delete redundant codes to restore LATCHED when timer resumes

2012-08-02 10:05:27 -07:00