Jernej Skrabec aef13fd842 drm/sun4i: DW HDMI PHY: Add support for second PLL ...

Some DW HDMI PHYs, like those found in A64 and R40 SoCs, can select
between two clock parents.

Add code which reads second PLL from DT.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180625120304.7543-19-jernej.skrabec@siol.net

2018-06-27 21:44:01 +02:00

..

drm

drm/sun4i: DW HDMI PHY: Add support for second PLL

2018-06-27 21:44:01 +02:00

host1x

gpu: host1x: Use not explicitly sized types

2018-05-18 21:51:37 +02:00

ipu-v3

gpu: ipu-v3: prg: avoid possible array underflow

2018-03-15 17:52:08 +01:00

vga

vga_switcheroo: Let HDA autosuspend on mux change

2018-03-13 22:58:49 +01:00

Makefile

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