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Use the PHY's cached max lane count value on all platforms similarly to LNL+. On LNL+ using the cached value is mandatory - since the corresponding HW register field can get cleared by the time the value is queried - on earlier platforms there isn't a problem with using the HW register instead. Having a uniform way to query the value still makes sense and it's also a bit more efficient, so do that. Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250805073700.642107-7-imre.deak@intel.com Signed-off-by: Imre Deak <imre.deak@intel.com>