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793a135214
Now that all parts of the driver have switched over to using xe_mmio for direct register access, we can drop the compatibility macros that allow continued xe_gt usage. v2: - Move removal of 8/16-bit read and xe_mmio_wait32_not() wrappers to this patch rather than removing them in earlier patches when last caller was removed. (Rodrigo) Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-88-matthew.d.roper@intel.com
44 lines
1.4 KiB
C
44 lines
1.4 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2021-2023 Intel Corporation
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*/
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#ifndef _XE_MMIO_H_
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#define _XE_MMIO_H_
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#include "xe_gt_types.h"
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struct xe_device;
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struct xe_reg;
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int xe_mmio_init(struct xe_device *xe);
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int xe_mmio_probe_tiles(struct xe_device *xe);
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u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);
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u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);
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void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);
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u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);
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u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);
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int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval);
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bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg reg);
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u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
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int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
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u32 timeout_us, u32 *out_val, bool atomic);
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int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
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u32 val, u32 timeout_us, u32 *out_val, bool atomic);
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static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)
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{
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if (addr < mmio->adj_limit)
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addr += mmio->adj_offset;
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return addr;
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}
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static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
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{
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return &xe->tiles[0].mmio;
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}
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#endif
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