José Roberto de Souza a5523e2ff0 drm/i915: Add PSR2 selective fetch registers ...

This registers will be used to implement PSR2 manual tracking/selective
fetch.

v2:
- Fixed typo in _PLANE_SEL_FETCH_BASE
- Renamed PSR2_MAN_TRK_CTL bits to better match spec names
- Renamed _PLANE_SEL_FETCH_* to better match spec names

BSpec: 55229
BSpec: 50424
BSpec: 50420
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200626010151.221388-3-jose.souza@intel.com

2020-06-30 17:25:47 -07:00

..

drm

drm/i915: Add PSR2 selective fetch registers

2020-06-30 17:25:47 -07:00

host1x

gpu: host1x: Use SMMU on Tegra124 and Tegra210

2020-04-28 11:44:07 +02:00

ipu-v3

gpu: ipu-v3: image-convert: only sample into the next tile if necessary

2019-08-19 16:25:30 +02:00

trace

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00

vga

vga: Fix Kconfig indentation

2019-11-20 17:40:32 +01:00

Makefile

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00