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On a vast majority of Qualcomm chipsets DisplayPort controller can support several MST streams (up to 4x). To support MST these chipsets use up to 4 stream pixel clocks for the DisplayPort controller and several extra register regions. Expand corresponding region and clock bindings for these platforms and fix example schema files to follow updated bindings. Note: On chipsets that support MST, the number of streams supported can vary between controllers. For example, SA8775P supports 4 MST streams on mdss_dp0 but only 2 streams on mdss_dp1. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/672585/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-7-7526f0311eaa@oss.qualcomm.com