Ben Skeggs 9bd2ddbaa2 drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger ...

Generated if you try and use fifo method 0x20 on any subchannel, appears
that it can be safely masked off without stalling the whole GPU.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

2013-02-20 16:00:46 +10:00

..

drm

drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger

2013-02-20 16:00:46 +10:00

stub

i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO

2011-04-13 09:10:25 +10:00

vga

Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux

2012-12-17 08:26:17 -08:00

Makefile

gpu: Add Intel GMA500(Poulsbo) Stub Driver

2010-10-26 11:00:13 +10:00