Peng Ju Zhou 9a3bf287c4 drm/amdgpu: Fixing "Indirect register access for Navi12 sriov" for vega10 ...

The NV12 and VEGA10 share the same interface W/RREG32_SOC15*,
the callback functions in these macros may not be defined,
so NULL pointer must be checked but not in
macro __WREG32_SOC15_RLC__, fixing the lock of NULL pointer check.

Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-06-07 14:57:38 -04:00

..

drm

drm/amdgpu: Fixing "Indirect register access for Navi12 sriov" for vega10

2021-06-07 14:57:38 -04:00

host1x

gpu: host1x: Add early init and late exit callbacks

2021-03-31 17:42:14 +02:00

ipu-v3

gpu: ipu-v3: Add Rec.709 limited range support to DP

2021-05-10 17:20:29 +02:00

trace

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vga

vgaarb: Use ACPI HID name to find integrated GPU

2021-05-20 14:55:56 -04:00

Makefile

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