mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-04-05 05:57:16 -04:00
ddeb8d5c1f
Add the compatible string "renesas,r9a09g057-mipi-dsi" for the Renesas RZ/V2H(P) (R9A09G057) SoC. While the MIPI DSI LINK registers are shared with the RZ/G2L SoC, the D-PHY register layout differs. Additionally, the RZ/V2H(P) uses only two resets compared to three on RZ/G2L, and requires five clocks instead of six. To reflect these hardware differences, update the binding schema to support the reduced clock and reset requirements for RZ/V2H(P). Since the RZ/V2N (R9A09G056) SoC integrates an identical DSI IP to RZ/V2H(P), the same "renesas,r9a09g057-mipi-dsi" compatible string is reused for RZ/V2N. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20251015192611.241920-6-prabhakar.mahadev-lad.rj@bp.renesas.com