Dmytro Laktyushkin 99326ee362 drm/amd/display: program display clock on cache match ...

[Why]
We seem to have an issue where high enough display clock
will not get set properly during S3 resume if we only
call vbios once

[How]
Expand condition of display clock programming to happen
even when cached display clock matches requested display
clock

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2018-08-06 15:57:12 -05:00

..

drm

drm/amd/display: program display clock on cache match

2018-08-06 15:57:12 -05:00

host1x

Merge tag 'drm-next-2018-06-06-1' of git://anongit.freedesktop.org/drm/drm

2018-06-06 08:16:33 -07:00

ipu-v3

gpu: ipu-v3: Allow negative offsets for interlaced scanning

2018-07-16 16:56:37 +02:00

vga

docs: Fix some broken references

2018-06-15 18:10:01 -03:00

Makefile

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