Files
linux/include
Sowjanya Komatineni b499779761 dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled
when using DDR interface mode.

This patch adds clock ID for this to dt-binding.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1608585459-17250-2-git-send-email-skomatineni@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06 13:09:27 +00:00
..
2020-12-28 14:21:31 +00:00
2020-12-28 14:21:31 +00:00