Alex Deucher 9596097be4 drm/amdgpu/gfx9: rework pipeline sync packet sequence ...

Replace WAIT_REG_MEM with EVENT_WRITE flushes for all
shader types and ACQUIRE_MEM.  That should accomplish
the same thing and avoid having to wait on a fence
preventing any issues with pipeline syncs during
queue resets.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2026-01-05 16:59:59 -05:00

..

drm

drm/amdgpu/gfx9: rework pipeline sync packet sequence

2026-01-05 16:59:59 -05:00

host1x

gpu: host1x: Syncpoint interrupt performance optimization

2025-11-14 18:27:19 +01:00

ipu-v3

gpu: ipu-v3: Switch to irq_find_mapping()

2025-05-16 21:06:12 +02:00

nova-core

gpu: nova-core: make formatting compatible with rust tree

2025-11-17 12:56:36 +00:00

trace

gpu/trace: make TRACE_GPU_MEM configurable

2025-07-08 09:34:47 -07:00

vga

vga_switcheroo: Use pci_is_display()

2025-07-17 15:30:13 -05:00

Makefile

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