Antoniu Miclaus 916354e7c7 iio: adc: ad4080: add support for AD4086 ...

Add support for AD4086 14-bit SAR ADC. The AD4086 differs from
AD4080 in resolution (14-bit vs 20-bit) and LVDS CNV clock count
maximum (4 vs 7).

Changes:
- Add AD4086_CHIP_ID definition (0x0056)
- Create ad4086_channel with 14-bit resolution and 16-bit storage
- Add ad4086_chip_info with lvds_cnv_clk_cnt_max = 4
- Register AD4086 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

2025-11-09 12:57:04 +00:00

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accel

accel/habanalabs: add Infineon version check

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Bluetooth: bcsp: receive data only if registered

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tpm: Prevent local DOS via tpm/tpm0/ppi/*operations

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i2c

Revert "i2c: boardinfo: Annotate code used in init phase only"

2025-10-11 23:57:33 +02:00

i3c

i3c: fix big-endian FIFO transfers

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idle

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iio

iio: adc: ad4080: add support for AD4086

2025-11-09 12:57:04 +00:00

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NTB: epf: Add Renesas rcar support

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