Marc Zyngier 0d98d00b8d arm64: KVM: vgic-v3: Reset LRs at boot time ...

In order to let the GICv3 code be more lazy in the way it
accesses the LRs, it is necessary to start with a clean slate.

Let's reset the LRs on each CPU when the vgic is probed (which
includes a round trip to EL2...).

Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

2016-03-09 04:24:09 +00:00

..

hyp

KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit

2016-03-09 04:23:56 +00:00

arch_timer.c

KVM: arm/arm64: timer: Add active state caching

2016-02-29 18:34:22 +00:00

pmu.c

arm64: KVM: Add a new vcpu device control group for PMUv3

2016-02-29 18:34:21 +00:00

trace.h

arm/arm64: KVM: Add tracepoints for vgic and timer

2015-10-22 23:01:48 +02:00

vgic-v2-emul.c

KVM: arm/arm64: vgic-v2: Make GICD_SGIR quicker to hit

2016-03-09 04:24:03 +00:00

vgic-v2.c

KVM: arm/arm64: vgic-v2: Reset LRs at boot time

2016-03-09 04:23:00 +00:00

vgic-v3-emul.c

KVM: arm: vgic: Drop useless Group0 warning

2015-06-17 09:58:12 +01:00

vgic-v3.c

arm64: KVM: vgic-v3: Reset LRs at boot time

2016-03-09 04:24:09 +00:00

vgic.c

KVM: arm/arm64: vgic: Ensure bitmaps are long enough

2016-02-23 19:02:48 +00:00

vgic.h

KVM: arm/arm64: rework MMIO abort handling to use KVM MMIO bus

2015-03-30 17:07:19 +01:00