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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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6724a76cff
Use a temporary register to reduce the size of detour code from 16 bytes to 8 bytes. The previous implementation is from 'commitafc76b8b80("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")'. Before the patch: <func_prolog>: 0: REG_S ra, -SZREG(sp) 4: auipc ra, ? 8: jalr ?(ra) 12: REG_L ra, -SZREG(sp) (func_boddy) After the patch: <func_prolog>: 0: auipc t0, ? 4: jalr t0, ?(t0) (func_boddy) This patch not just reduces the size of detour code, but also fixes an important issue: An Ftrace callback registered with FTRACE_OPS_FL_IPMODIFY flag can actually change the instruction pointer, e.g. to "replace" the given kernel function with a new one, which is needed for livepatching, etc. In this case, the trampoline (ftrace_regs_caller) would not return to <func_prolog+12> but would rather jump to the new function. So, "REG_L ra, -SZREG(sp)" would not run and the original return address would not be restored. The kernel is likely to hang or crash as a result. This can be easily demonstrated if one tries to "replace", say, cmdline_proc_show() with a new function with the same signature using instruction_pointer_set(&fregs->regs, new_func_addr) in the Ftrace callback. Link: https://lore.kernel.org/linux-riscv/20221122075440.1165172-1-suagrfillet@gmail.com/ Link: https://lore.kernel.org/linux-riscv/d7d5730b-ebef-68e5-5046-e763e1ee6164@yadro.com/ Co-developed-by: Song Shuai <suagrfillet@gmail.com> Signed-off-by: Song Shuai <suagrfillet@gmail.com> Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Cc: Evgenii Shatokhin <e.shatokhin@yadro.com> Reviewed-by: Evgenii Shatokhin <e.shatokhin@yadro.com> Link: https://lore.kernel.org/r/20230112090603.1295340-4-guoren@kernel.org Cc: stable@vger.kernel.org Fixes:10626c32e3("riscv/ftrace: Add basic support") Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
115 lines
3.0 KiB
C
115 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2017 Andes Technology Corporation */
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#ifndef _ASM_RISCV_FTRACE_H
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#define _ASM_RISCV_FTRACE_H
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/*
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* The graph frame test is not possible if CONFIG_FRAME_POINTER is not enabled.
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* Check arch/riscv/kernel/mcount.S for detail.
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*/
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#if defined(CONFIG_FUNCTION_GRAPH_TRACER) && defined(CONFIG_FRAME_POINTER)
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#define HAVE_FUNCTION_GRAPH_FP_TEST
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#endif
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#define HAVE_FUNCTION_GRAPH_RET_ADDR_PTR
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/*
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* Clang prior to 13 had "mcount" instead of "_mcount":
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* https://reviews.llvm.org/D98881
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*/
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#if defined(CONFIG_CC_IS_GCC) || CONFIG_CLANG_VERSION >= 130000
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#define MCOUNT_NAME _mcount
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#else
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#define MCOUNT_NAME mcount
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#endif
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#define ARCH_SUPPORTS_FTRACE_OPS 1
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#ifndef __ASSEMBLY__
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void MCOUNT_NAME(void);
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static inline unsigned long ftrace_call_adjust(unsigned long addr)
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{
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return addr;
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}
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struct dyn_arch_ftrace {
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};
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#endif
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#ifdef CONFIG_DYNAMIC_FTRACE
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/*
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* A general call in RISC-V is a pair of insts:
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* 1) auipc: setting high-20 pc-related bits to ra register
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* 2) jalr: setting low-12 offset to ra, jump to ra, and set ra to
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* return address (original pc + 4)
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*
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*<ftrace enable>:
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* 0: auipc t0/ra, 0x?
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* 4: jalr t0/ra, ?(t0/ra)
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*
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*<ftrace disable>:
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* 0: nop
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* 4: nop
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*
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* Dynamic ftrace generates probes to call sites, so we must deal with
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* both auipc and jalr at the same time.
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*/
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#define MCOUNT_ADDR ((unsigned long)MCOUNT_NAME)
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#define JALR_SIGN_MASK (0x00000800)
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#define JALR_OFFSET_MASK (0x00000fff)
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#define AUIPC_OFFSET_MASK (0xfffff000)
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#define AUIPC_PAD (0x00001000)
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#define JALR_SHIFT 20
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#define JALR_RA (0x000080e7)
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#define AUIPC_RA (0x00000097)
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#define JALR_T0 (0x000282e7)
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#define AUIPC_T0 (0x00000297)
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#define NOP4 (0x00000013)
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#define to_jalr_t0(offset) \
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(((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_T0)
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#define to_auipc_t0(offset) \
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((offset & JALR_SIGN_MASK) ? \
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(((offset & AUIPC_OFFSET_MASK) + AUIPC_PAD) | AUIPC_T0) : \
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((offset & AUIPC_OFFSET_MASK) | AUIPC_T0))
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#define make_call_t0(caller, callee, call) \
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do { \
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unsigned int offset = \
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(unsigned long) callee - (unsigned long) caller; \
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call[0] = to_auipc_t0(offset); \
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call[1] = to_jalr_t0(offset); \
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} while (0)
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#define to_jalr_ra(offset) \
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(((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_RA)
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#define to_auipc_ra(offset) \
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((offset & JALR_SIGN_MASK) ? \
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(((offset & AUIPC_OFFSET_MASK) + AUIPC_PAD) | AUIPC_RA) : \
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((offset & AUIPC_OFFSET_MASK) | AUIPC_RA))
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#define make_call_ra(caller, callee, call) \
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do { \
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unsigned int offset = \
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(unsigned long) callee - (unsigned long) caller; \
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call[0] = to_auipc_ra(offset); \
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call[1] = to_jalr_ra(offset); \
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} while (0)
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/*
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* Let auipc+jalr be the basic *mcount unit*, so we make it 8 bytes here.
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*/
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#define MCOUNT_INSN_SIZE 8
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#ifndef __ASSEMBLY__
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struct dyn_ftrace;
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int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec);
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#define ftrace_init_nop ftrace_init_nop
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#endif
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#endif
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#endif /* _ASM_RISCV_FTRACE_H */
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