Anusha Srivatsa 86c0ef7234 drm/i915/display: Add CDCLK Support for MTL ...

As per bSpec MTL has 38.4 MHz Reference clock.
Adding the cdclk tables and cdclk_funcs that MTL
will use.

v2: Revert to using bxt_get_cdclk()

BSpec: 65243

Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221117230002.792096-3-anusha.srivatsa@intel.com

2022-11-21 15:19:50 -08:00

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drm

drm/i915/display: Add CDCLK Support for MTL

2022-11-21 15:19:50 -08:00

host1x

gpu: host1x: Use the bitmap API to allocate bitmaps

2022-07-08 17:38:34 +02:00

ipu-v3

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trace

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vga

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Makefile

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