Rajneesh Bhardwaj 8434709ba7 platform/x86: intel_pmc_core: Fix PWRMBASE mask and mmio reg len ...

On Sunrise Point PCH, the Power Management Controller provides 4K bytes of
memory space for various power management and debug registers. This fix is
needed to access power management & debug registers that are mapped at a
higher offset.

Also, this provides a fix for correctly masking the PWRMBASE as the initial
bits (0-11) are reserved.

Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Signed-off-by: Darren Hart <dvhart@linux.intel.com>

2016-12-13 09:28:54 -08:00

..

chrome

mfd: cros_ec: Add MKBP event support

2016-08-31 10:50:59 +01:00

goldfish

mm: replace get_user_pages() write/force parameters with gup_flags

2016-10-19 08:11:43 -07:00

mips

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

2016-05-19 10:02:26 -07:00

olpc

platform/olpc: Make ec explicitly non-modular

2016-08-28 22:31:52 -07:00

x86

platform/x86: intel_pmc_core: Fix PWRMBASE mask and mmio reg len

2016-12-13 09:28:54 -08:00

Kconfig

goldfish: refactor goldfish platform configs

2016-01-28 23:34:36 -08:00

Makefile

MIPS: Loongson-3: Add CPU Hwmon platform driver

2015-04-01 17:22:17 +02:00