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This patch introduces a new UIO driver, uio_pci_generic_sva, which extends the functionality of uio_pci_generic by adding support for Shared Virtual Addressing (SVA) when IOMMU is enabled in the system. The key enhancement allows PCI devices to directly use user-space virtual addresses for DMA operations, eliminating the need for bounce buffers or explicit IOVA mapping. This is achieved by leveraging the kernel's IOMMU-SVA subsystem, including process address space attachment, page fault handling, and shared context management between CPU and device. With this driver, userspace applications can perform zero-copy DMA using native pointers: void *addr = malloc(N); set_dma_addr((uint64_t)addr); // Passing user VA directly start_dma(); The device can now access 'addr' through the IOMMU's PASID-based translation, provided that the underlying IOMMU hardware (e.g., Intel VT-d 3.1+, AMD-Vi, ARM SMMU, RISCV IOMMU) and platform support SVA. Dependencies: - CONFIG_IOMMU_SVA must be enabled. - The platform must support PRI (Page Request Interface) and PASID. - Device drivers/userspace must handle page faults if demand-paging is used. The implementation reuses core logic from uio_pci_generic.c while adding PASID setting, and integration with the IOMMU SVA APIs. Also, add a read-only sysfs attribute 'pasid' to expose the Process Address Space ID assigned by IOMMU driver when binding an SVA-enabled device. For details, refer to the ABI documentation for uio_pci_sva driver sysfs attribute (Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid). Signed-off-by: Yaxing Guo <guoyaxing@bosc.ac.cn> Link: https://patch.msgid.link/20250926095828.506-1-guoyaxing@bosc.ac.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
30 lines
1.1 KiB
Plaintext
30 lines
1.1 KiB
Plaintext
What: /sys/bus/pci/drivers/uio_pci_sva/<pci_dev>/pasid
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Date: September 2025
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Contact: Yaxing Guo <guoyaxing@bosc.ac.cn>
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Description:
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Process Address Space ID (PASID) assigned by IOMMU driver to
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the device for use with Shared Virtual Addressing (SVA).
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This read-only attribute exposes the PASID (A 20-bit identifier
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used in PCIe Address Translation Services and iommu table walks)
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allocated by the IOMMU driver during sva device binding.
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User-space UIO applications must read this attribute to obtain
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the PASID and program it into the device's configuration registers.
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This enables the device to perform DMA using user-space virtual
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address, with address translation handled by IOMMU.
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UIO User-space applications must:
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- Opening device and Mapping the device's register space via /dev/uioX
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(This triggers the IOMMU driver to allocate the PASID)
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- Reading the PASID from sysfs
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- Writing the PASID to a device-specific register (with example offset)
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The code may be like:
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map = mmap(..., "/dev/uio0", ...);
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f = fopen("/sys/.../pasid", "r");
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fscanf(f, "%d", &pasid);
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map[REG_PASID_OFFSET] = pasid;
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