Files
linux/include
Li, Zhen-Hua 82aeef0bf0 x86/iommu: correct ICS register offset
According to Intel Vt-D specs, the offset of Invalidation complete
status register should be 0x9C, not 0x98.

See Intel's VT-d spec, Revision 1.3, Chapter 10.4, Page 98;

Signed-off-by: Li, Zhen-Hua <zhen-hual@hp.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-09-24 13:04:07 +02:00
..
2013-08-30 14:14:25 +02:00
2013-09-21 10:44:55 -04:00