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80dd5911cb
Add support for DSI on Qualcomm SM8750 SoC with notable difference: DSI PHY PLLs, the parents of pixel and byte clocks, cannot be used as parents before DSI PHY is configured, the PLLs are prepared and their initial rate is set. Therefore assigned-clock-parents are not working here and driver is responsible for reparenting clocks with proper procedure: see dsi_clk_init_6g_v2_9(). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659619/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-7-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>