linux

mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-04-10 20:38:50 -04:00

Files

Nicholas Kazlauskas 641e0e1f5d drm/amd/display: Fix prefetch bandwidth calculation for DCN3.1

[Why]
Prefetch BW calculated is lower than the DML reference because of a
porting error that's excluding cursor and row bandwidth from the
pixel data bandwidth.

[How]
Change the dml_max4 to dml_max3 and include cursor and row bandwidth
in the same calculation as the rest of the pixel data during vactive.

Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-10-19 17:19:06 -04:00

dcn20

drm/amd/display: Re-arrange FPU code structure for dcn2x

2021-10-06 15:49:24 -04:00

dcn21

drm/amd/display: Reduce stack size for dml21_ModeSupportAndSystemConfigurationFull

2021-09-23 15:17:30 -04:00

dcn30

drm/amd/display: Fix rest of pass-by-value structs in DML

2021-09-23 15:17:30 -04:00

dcn31

drm/amd/display: Fix prefetch bandwidth calculation for DCN3.1