Files
linux/arch
Geert Uytterhoeven 77899dd2c0 arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
Add a device node for the second Cortex-A53 CPU core on the Renesas
R-Car V3M (r8a77970) SoC, and adjust the interrupt delivery masks for
ARM Generic Interrupt Controller and Architectured Timer.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:12 +02:00
..
2018-04-11 10:28:38 -07:00
2018-04-10 09:58:58 -04:00
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2018-04-11 10:28:39 -07:00
2018-04-11 10:28:38 -07:00