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72df72e1c6
Add a test case to verify x86's bus lock exit functionality, which is now supported on both Intel and AMD. Trigger bus lock exits by performing a split-lock access, i.e. an atomic access that splits two cache lines. Verify that the correct number of bus lock exits are generated, and that the counter is incremented correctly and at the appropriate time based on the underlying architecture. Generate bus locks in both L1 and L2 (if nested virtualization is enabled), as SVM's functionality in particular requires non-trivial logic to do the right thing when running nested VMs. Signed-off-by: Nikunj A Dadhania <nikunj@amd.com> Co-developed-by: Manali Shukla <manali.shukla@amd.com> Signed-off-by: Manali Shukla <manali.shukla@amd.com> Link: https://lore.kernel.org/r/20250502050346.14274-6-manali.shukla@amd.com Co-developed-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com>