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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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adfcf6e89b
Replace the static array of algorithms with a call to an architecture helper to register algorithms. This serves two purposes: it avoid having to register all algorithms in a single central place, and it removes the need for the priority field by just registering the algorithms that the architecture considers suitable for the currently running CPUs. [hch@lst.de: register avx512 after avx2] Link: https://lore.kernel.org/20260527074539.2292913-3-hch@lst.de Link: https://lore.kernel.org/20260518051804.462141-11-hch@lst.de Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # kunit only on arm64 Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Borislav Petkov (AMD)" <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Mason <clm@fb.com> Cc: Christian Borntraeger <borntraeger@linux.ibm.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: David Sterba <dsterba@suse.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Li Nan <linan122@huawei.com> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Song Liu <song@kernel.org> Cc: Sven Schnelle <svens@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: WANG Xuerui <kernel@xen0n.name> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
127 lines
4.0 KiB
Makefile
127 lines
4.0 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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ccflags-y += -I $(src)
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ifeq ($(CONFIG_RAID6_PQ_ARCH),y)
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CFLAGS_algos.o += -I$(src)/$(SRCARCH)
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endif
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obj-$(CONFIG_RAID6_PQ) += raid6_pq.o tests/
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raid6_pq-y += algos.o tables.o
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# generic integer generation and recovery implementation
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raid6_pq-y += int1.o int2.o int4.o int8.o
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raid6_pq-y += recov.o
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# architecture-specific generation and recovery implementations:
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raid6_pq-$(CONFIG_KERNEL_MODE_NEON) += arm/neon.o \
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arm/neon1.o \
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arm/neon2.o \
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arm/neon4.o \
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arm/neon8.o \
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arm/recov_neon.o \
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arm/recov_neon_inner.o
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raid6_pq-$(CONFIG_LOONGARCH) += loongarch/loongarch_simd.o \
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loongarch/recov_loongarch_simd.o
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raid6_pq-$(CONFIG_ALTIVEC) += powerpc/altivec1.o \
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powerpc/altivec2.o \
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powerpc/altivec4.o \
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powerpc/altivec8.o \
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powerpc/vpermxor1.o \
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powerpc/vpermxor2.o \
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powerpc/vpermxor4.o \
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powerpc/vpermxor8.o
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raid6_pq-$(CONFIG_RISCV_ISA_V) += riscv/rvv.o \
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riscv/recov_rvv.o
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raid6_pq-$(CONFIG_S390) += s390/s390vx8.o \
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s390/recov_s390xc.o
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ifeq ($(CONFIG_X86),y)
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raid6_pq-$(CONFIG_X86_32) += x86/mmx.o \
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x86/sse1.o
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endif
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raid6_pq-$(CONFIG_X86) += x86/sse2.o \
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x86/avx2.o \
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x86/avx512.o \
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x86/recov_ssse3.o \
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x86/recov_avx2.o \
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x86/recov_avx512.o
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hostprogs += mktables
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CFLAGS_arm/neon1.o += $(CC_FLAGS_FPU)
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CFLAGS_arm/neon2.o += $(CC_FLAGS_FPU)
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CFLAGS_arm/neon4.o += $(CC_FLAGS_FPU)
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CFLAGS_arm/neon8.o += $(CC_FLAGS_FPU)
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CFLAGS_arm/recov_neon_inner.o += $(CC_FLAGS_FPU)
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CFLAGS_REMOVE_arm/neon1.o += $(CC_FLAGS_NO_FPU)
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CFLAGS_REMOVE_arm/neon2.o += $(CC_FLAGS_NO_FPU)
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CFLAGS_REMOVE_arm/neon4.o += $(CC_FLAGS_NO_FPU)
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CFLAGS_REMOVE_arm/neon8.o += $(CC_FLAGS_NO_FPU)
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CFLAGS_REMOVE_arm/recov_neon_inner.o += $(CC_FLAGS_NO_FPU)
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ifeq ($(CONFIG_ALTIVEC),y)
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altivec_flags := -maltivec $(call cc-option,-mabi=altivec)
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# Enable <altivec.h>
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altivec_flags += -isystem $(shell $(CC) -print-file-name=include)
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CFLAGS_powerpc/altivec1.o += $(altivec_flags)
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CFLAGS_powerpc/altivec2.o += $(altivec_flags)
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CFLAGS_powerpc/altivec4.o += $(altivec_flags)
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CFLAGS_powerpc/altivec8.o += $(altivec_flags)
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CFLAGS_powerpc/vpermxor1.o += $(altivec_flags)
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CFLAGS_powerpc/vpermxor2.o += $(altivec_flags)
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CFLAGS_powerpc/vpermxor4.o += $(altivec_flags)
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CFLAGS_powerpc/vpermxor8.o += $(altivec_flags)
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ifdef CONFIG_CC_IS_CLANG
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# clang ppc port does not yet support -maltivec when -msoft-float is
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# enabled. A future release of clang will resolve this
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# https://llvm.org/pr31177
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CFLAGS_REMOVE_powerpc/altivec1.o += -msoft-float
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CFLAGS_REMOVE_powerpc/altivec2.o += -msoft-float
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CFLAGS_REMOVE_powerpc/altivec4.o += -msoft-float
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CFLAGS_REMOVE_powerpc/altivec8.o += -msoft-float
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CFLAGS_REMOVE_powerpc/vpermxor1.o += -msoft-float
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CFLAGS_REMOVE_powerpc/vpermxor2.o += -msoft-float
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CFLAGS_REMOVE_powerpc/vpermxor4.o += -msoft-float
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CFLAGS_REMOVE_powerpc/vpermxor8.o += -msoft-float
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endif # CONFIG_CC_IS_CLANG
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endif # CONFIG_ALTIVEC
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quiet_cmd_mktable = TABLE $@
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cmd_mktable = $(obj)/mktables > $@
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targets += tables.c
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$(obj)/tables.c: $(obj)/mktables FORCE
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$(call if_changed,mktable)
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quiet_cmd_unroll = UNROLL $@
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cmd_unroll = $(AWK) -v N=$* -f $(src)/unroll.awk < $< > $@
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targets += int1.c int2.c int4.c int8.c
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$(obj)/int%.c: $(src)/int.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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targets += arm/neon1.c arm/neon2.c arm/neon4.c arm/neon8.c
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$(obj)/arm/neon%.c: $(src)/arm/neon.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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targets += powerpc/altivec1.c \
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powerpc/altivec2.c \
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powerpc/altivec4.c \
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powerpc/altivec8.c
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$(obj)/powerpc/altivec%.c: $(src)/powerpc/altivec.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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targets += powerpc/vpermxor1.c \
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powerpc/vpermxor2.c \
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powerpc/vpermxor4.c \
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powerpc/vpermxor8.c
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$(obj)/powerpc/vpermxor%.c: $(src)/powerpc/vpermxor.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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targets += s390/s390vx8.c
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$(obj)/s390/s390vx%.c: $(src)/s390/s390vx.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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