mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-02-17 16:00:38 -05:00
d22037f3fd
Initialize and configure platform-specific capabilities for the encoder in the firmware during stream-on, to tailor encoding behavior to the current session's requirements. Some of these capabilities can also be updated dynamically when V4L2 controls are modified by the client after stream-on. Tested-by: Vikash Garodia <quic_vgarodia@quicinc.com> # X1E80100 Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e80100-crd Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
38 lines
2.1 KiB
C
38 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
|
*/
|
|
|
|
#ifndef __IRIS_CTRLS_H__
|
|
#define __IRIS_CTRLS_H__
|
|
|
|
#include "iris_platform_common.h"
|
|
|
|
struct iris_core;
|
|
struct iris_inst;
|
|
|
|
int iris_ctrls_init(struct iris_inst *inst);
|
|
void iris_session_init_caps(struct iris_core *core);
|
|
int iris_set_u32_enum(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_stage(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_pipe(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_u32(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_profile(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_level(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_profile_level_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_header_mode_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_header_mode_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_bitrate(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_peak_bitrate(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_bitrate_mode_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_bitrate_mode_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_entropy_mode_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_entropy_mode_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_min_qp(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_max_qp(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_frame_qp(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_qp_range(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
|
|
int iris_set_properties(struct iris_inst *inst, u32 plane);
|
|
|
|
#endif
|