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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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c6c973dbfa
The minimum supported GCC version is 8.1, which supports flag output operands and always defines __GCC_ASM_FLAG_OUTPUTS__ macro. Remove code depending on __GCC_ASM_FLAG_OUTPUTS__ and use the "=@ccCOND" flag output operand directly. Use the equivalent "=@ccz" instead of "=@cce" flag output operand for CMPXCHG8B and CMPXCHG16B instructions. These instructions set a single flag bit - the Zero flag - and "=@ccz" is used to distinguish the CC user from comparison instructions, where set ZERO flag indeed means that the values are equal. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20250905121723.GCaLrU04lP2A50PT-B@fat_crate.local
96 lines
2.5 KiB
C
96 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CMPXCHG_64_H
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#define _ASM_X86_CMPXCHG_64_H
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#define arch_cmpxchg64(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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arch_cmpxchg((ptr), (o), (n)); \
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})
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#define arch_cmpxchg64_local(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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arch_cmpxchg_local((ptr), (o), (n)); \
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})
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#define arch_try_cmpxchg64(ptr, po, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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arch_try_cmpxchg((ptr), (po), (n)); \
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})
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#define arch_try_cmpxchg64_local(ptr, po, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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arch_try_cmpxchg_local((ptr), (po), (n)); \
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})
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union __u128_halves {
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u128 full;
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struct {
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u64 low, high;
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};
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};
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#define __arch_cmpxchg128(_ptr, _old, _new, _lock) \
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({ \
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union __u128_halves o = { .full = (_old), }, \
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n = { .full = (_new), }; \
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\
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asm_inline volatile(_lock "cmpxchg16b %[ptr]" \
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: [ptr] "+m" (*(_ptr)), \
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"+a" (o.low), "+d" (o.high) \
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: "b" (n.low), "c" (n.high) \
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: "memory"); \
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\
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o.full; \
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})
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static __always_inline u128 arch_cmpxchg128(volatile u128 *ptr, u128 old, u128 new)
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{
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return __arch_cmpxchg128(ptr, old, new, LOCK_PREFIX);
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}
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#define arch_cmpxchg128 arch_cmpxchg128
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static __always_inline u128 arch_cmpxchg128_local(volatile u128 *ptr, u128 old, u128 new)
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{
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return __arch_cmpxchg128(ptr, old, new,);
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}
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#define arch_cmpxchg128_local arch_cmpxchg128_local
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#define __arch_try_cmpxchg128(_ptr, _oldp, _new, _lock) \
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({ \
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union __u128_halves o = { .full = *(_oldp), }, \
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n = { .full = (_new), }; \
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bool ret; \
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\
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asm_inline volatile(_lock "cmpxchg16b %[ptr]" \
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: "=@ccz" (ret), \
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[ptr] "+m" (*(_ptr)), \
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"+a" (o.low), "+d" (o.high) \
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: "b" (n.low), "c" (n.high) \
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: "memory"); \
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\
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if (unlikely(!ret)) \
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*(_oldp) = o.full; \
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\
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likely(ret); \
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})
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static __always_inline bool arch_try_cmpxchg128(volatile u128 *ptr, u128 *oldp, u128 new)
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{
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return __arch_try_cmpxchg128(ptr, oldp, new, LOCK_PREFIX);
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}
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#define arch_try_cmpxchg128 arch_try_cmpxchg128
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static __always_inline bool arch_try_cmpxchg128_local(volatile u128 *ptr, u128 *oldp, u128 new)
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{
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return __arch_try_cmpxchg128(ptr, oldp, new,);
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}
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#define arch_try_cmpxchg128_local arch_try_cmpxchg128_local
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#define system_has_cmpxchg128() boot_cpu_has(X86_FEATURE_CX16)
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#endif /* _ASM_X86_CMPXCHG_64_H */
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