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b3cf07851b
Currently, x86, Riscv and Loongarch use the generic entry code, which makes maintainer's work easier and code more elegant. Start converting arm64 to use the generic entry infrastructure from kernel/entry/* by switching it to generic IRQ entry, which removes 100+ lines of duplicate code. arm64 will completely switch to generic entry in a later series. The changes are below: - Remove *enter_from/exit_to_kernel_mode(), and wrap with generic irqentry_enter/exit() as their code and functionality are almost identical. - Define ARCH_EXIT_TO_USER_MODE_WORK and implement arch_exit_to_user_mode_work() to check arm64-specific thread flags "_TIF_MTE_ASYNC_FAULT" and "_TIF_FOREIGN_FPSTATE". So also remove *enter_from/exit_to_user_mode(), and wrap with generic enter_from/exit_to_user_mode() because they are exactly the same. - Remove arm64_enter/exit_nmi() and use generic irqentry_nmi_enter/exit() because they're exactly the same, so the temporary arm64 version irqentry_state can also be removed. - Remove PREEMPT_DYNAMIC code, as generic irqentry_exit_cond_resched() has the same functionality. - Implement arch_irqentry_exit_need_resched() with arm64_preempt_schedule_irq() for arm64 which will allow arm64 to do its architecture specific checks. Tested-by: Ada Couprie Diaz <ada.coupriediaz@arm.com> Suggested-by: Ada Couprie Diaz <ada.coupriediaz@arm.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
58 lines
1.6 KiB
C
58 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_ARM64_ENTRY_COMMON_H
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#define _ASM_ARM64_ENTRY_COMMON_H
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#include <linux/thread_info.h>
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#include <asm/cpufeature.h>
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#include <asm/daifflags.h>
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#include <asm/fpsimd.h>
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#include <asm/mte.h>
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#include <asm/stacktrace.h>
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#define ARCH_EXIT_TO_USER_MODE_WORK (_TIF_MTE_ASYNC_FAULT | _TIF_FOREIGN_FPSTATE)
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static __always_inline void arch_exit_to_user_mode_work(struct pt_regs *regs,
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unsigned long ti_work)
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{
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if (ti_work & _TIF_MTE_ASYNC_FAULT) {
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clear_thread_flag(TIF_MTE_ASYNC_FAULT);
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send_sig_fault(SIGSEGV, SEGV_MTEAERR, (void __user *)NULL, current);
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}
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if (ti_work & _TIF_FOREIGN_FPSTATE)
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fpsimd_restore_current_state();
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}
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#define arch_exit_to_user_mode_work arch_exit_to_user_mode_work
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static inline bool arch_irqentry_exit_need_resched(void)
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{
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/*
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* DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC
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* priority masking is used the GIC irqchip driver will clear DAIF.IF
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* using gic_arch_enable_irqs() for normal IRQs. If anything is set in
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* DAIF we must have handled an NMI, so skip preemption.
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*/
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if (system_uses_irq_prio_masking() && read_sysreg(daif))
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return false;
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/*
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* Preempting a task from an IRQ means we leave copies of PSTATE
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* on the stack. cpufeature's enable calls may modify PSTATE, but
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* resuming one of these preempted tasks would undo those changes.
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*
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* Only allow a task to be preempted once cpufeatures have been
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* enabled.
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*/
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if (!system_capabilities_finalized())
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return false;
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return true;
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}
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#define arch_irqentry_exit_need_resched arch_irqentry_exit_need_resched
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#endif /* _ASM_ARM64_ENTRY_COMMON_H */
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