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The current submission opcode sequence first takes the engine MLOCK, and then switches to HOST1X class to wait prefences. This is fine while we only use a single channel per engine and there is no virtualization, since jobs are serialized on that one channel anyway. However, when that assumption doesn't hold, we are keeping the engine locked while not running anything on it while waiting for prefences to complete. To resolve this, execute wait commands in the beginning of the job outside the engine MLOCK. We still take the HOST1X MLOCK because recent hardware requires register opcodes to be executed within some MLOCK, but the hardware also allows unlimited channels to take the HOST1X MLOCK at the same time. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20250708-host1x-wait-prefences-outside-mlock-v1-1-13e98044e35a@nvidia.com