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9b58f88a1f
Add bindings to expose the On Chip One-Time Programmable Controller (OCOTP) for the NXP s32g chipset. There are three versions of this chip but they're compatible so we can fall back to the nxp,s32g2-ocotp compatible. Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://lore.kernel.org/r/20250912131415.303407-2-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
911 B
YAML
46 lines
911 B
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/nvmem/nxp,s32g-ocotp-nvmem.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP S32G OCOTP NVMEM driver
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maintainers:
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- Ciprian Costea <ciprianmarian.costea@nxp.com>
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description:
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The drivers provides an interface to access One Time
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Programmable memory pages, such as TMU fuse values.
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properties:
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compatible:
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oneOf:
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- enum:
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- nxp,s32g2-ocotp
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- items:
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- enum:
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- nxp,s32g3-ocotp
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- nxp,s32r45-ocotp
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- const: nxp,s32g2-ocotp
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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allOf:
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- $ref: nvmem.yaml#
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examples:
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- |
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nvmem@400a4000 {
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compatible = "nxp,s32g2-ocotp";
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reg = <0x400a4000 0x400>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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