mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-12-27 10:01:39 -05:00
83d76bf036
The SARADC controller in most Rockchip SoCs are part of power domains that are always powered on, i.e. PD_BUS or PD_PERI. These always powered on power domains have typically not been described in the device tree. Because these power domains have been left out of the device tree there has not been any real need to properly describe the power domain of the SARADC controller. On RK3528 the SARADC controller is part of the PD_VPU power domain. Add support to describe an optional power-domains for the SARADC controller in Rockchip SoCs. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250723085654.2273324-4-jonas@kwiboo.se Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
92 lines
2.0 KiB
YAML
92 lines
2.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Rockchip Successive Approximation Register (SAR) A/D Converter
|
|
|
|
maintainers:
|
|
- Heiko Stuebner <heiko@sntech.de>
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- const: rockchip,saradc
|
|
- const: rockchip,rk3066-tsadc
|
|
- const: rockchip,rk3399-saradc
|
|
- const: rockchip,rk3528-saradc
|
|
- const: rockchip,rk3562-saradc
|
|
- const: rockchip,rk3588-saradc
|
|
- items:
|
|
- const: rockchip,rk3576-saradc
|
|
- const: rockchip,rk3588-saradc
|
|
- items:
|
|
- enum:
|
|
- rockchip,px30-saradc
|
|
- rockchip,rk3308-saradc
|
|
- rockchip,rk3328-saradc
|
|
- rockchip,rk3568-saradc
|
|
- rockchip,rv1108-saradc
|
|
- rockchip,rv1126-saradc
|
|
- const: rockchip,rk3399-saradc
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
items:
|
|
- description: converter clock
|
|
- description: peripheral clock
|
|
|
|
clock-names:
|
|
items:
|
|
- const: saradc
|
|
- const: apb_pclk
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
reset-names:
|
|
const: saradc-apb
|
|
|
|
vref-supply:
|
|
description:
|
|
The regulator supply for the ADC reference voltage.
|
|
|
|
"#io-channel-cells":
|
|
const: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
- vref-supply
|
|
- "#io-channel-cells"
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/rk3288-cru.h>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
saradc: saradc@2006c000 {
|
|
compatible = "rockchip,saradc";
|
|
reg = <0x2006c000 0x100>;
|
|
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
|
clock-names = "saradc", "apb_pclk";
|
|
resets = <&cru SRST_SARADC>;
|
|
reset-names = "saradc-apb";
|
|
vref-supply = <&vcc18>;
|
|
#io-channel-cells = <1>;
|
|
};
|