Files
linux/drivers
Chaitanya Kumar Borah 5a3c46b809 drm/i915/display: Set correct voltage level for 480MHz CDCLK
According to Bspec, the voltage level for 480MHz is to be set as 1
instead of 2.

BSpec: 49208

Fixes: 06f1b06dc5 ("drm/i915/display: Add 480 MHz CDCLK steps for RPL-U")

v2: rebase

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230529060747.3972259-1-chaitanya.kumar.borah@intel.com
2023-06-02 14:26:15 -07:00
..
2023-05-12 09:09:06 -06:00
2023-05-09 15:03:40 +02:00