Nicholas Kazlauskas 562c805f83 drm/amd/display: Support CW4 for DMUB ringbuffer inbox ...

[Why]
Region 4 is non cacheable and slower than using cache window 4.

[How]
Check the firmware version to determine how we should program the
base address and memory windows.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-05-28 14:00:48 -04:00

..

drm

drm/amd/display: Support CW4 for DMUB ringbuffer inbox

2020-05-28 14:00:48 -04:00

host1x

Merge tag 'drm/tegra/for-5.6-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux into drm-next

2020-02-07 12:22:30 +10:00

ipu-v3

…

trace

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00

vga

vga: Fix Kconfig indentation

2019-11-20 17:40:32 +01:00

Makefile

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00