Aric Cyr 5396fa590d drm/amd/display: Fix incorrect backlight register offset for DCN ...

[Why]
Typo in backlight refactor inctroduced wrong register offset.

[How]
Change DCE to DCN register map for PWRSEQ_REF_DIV

Cc: stable@vger.kernel.org
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-08-10 17:26:52 -04:00

..

drm

drm/amd/display: Fix incorrect backlight register offset for DCN

2020-08-10 17:26:52 -04:00

host1x

gpu: host1x: Use SMMU on Tegra124 and Tegra210

2020-04-28 11:44:07 +02:00

ipu-v3

gpu: ipu-v3: image-convert: only sample into the next tile if necessary

2019-08-19 16:25:30 +02:00

trace

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00

vga

vga: Fix Kconfig indentation

2019-11-20 17:40:32 +01:00

Makefile

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00