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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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0c6e6f1357
CXL spec 3.2 section 8.2.10.9.11.1 describes the device patrol scrub control feature. The device patrol scrub proactively locates and makes corrections to errors in regular cycle. Allow specifying the number of hours within which the patrol scrub must be completed, subject to minimum and maximum limits reported by the device. Also allow disabling scrub allowing trade-off error rates against performance. Add support for patrol scrub control on CXL memory devices. Register with the EDAC device driver, which retrieves the scrub attribute descriptors from EDAC scrub and exposes the sysfs scrub control attributes to userspace. For example, scrub control for the CXL memory device "cxl_mem0" is exposed in /sys/bus/edac/devices/cxl_mem0/scrubX/. Additionally, add support for region-based CXL memory patrol scrub control. CXL memory regions may be interleaved across one or more CXL memory devices. For example, region-based scrub control for "cxl_region1" is exposed in /sys/bus/edac/devices/cxl_region1/scrubX/. [dj: A few formatting fixes from Jonathan] Reviewed-by: Dave Jiang <dave.jiang@intel.com> Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Link: https://patch.msgid.link/20250521124749.817-4-shiju.jose@huawei.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
78 lines
2.3 KiB
Makefile
78 lines
2.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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ldflags-y += --wrap=acpi_table_parse_cedt
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ldflags-y += --wrap=is_acpi_device_node
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ldflags-y += --wrap=acpi_evaluate_integer
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ldflags-y += --wrap=acpi_pci_find_root
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ldflags-y += --wrap=nvdimm_bus_register
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ldflags-y += --wrap=devm_cxl_port_enumerate_dports
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ldflags-y += --wrap=devm_cxl_setup_hdm
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ldflags-y += --wrap=devm_cxl_add_passthrough_decoder
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ldflags-y += --wrap=devm_cxl_enumerate_decoders
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ldflags-y += --wrap=cxl_await_media_ready
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ldflags-y += --wrap=cxl_hdm_decode_init
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ldflags-y += --wrap=cxl_dvsec_rr_decode
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ldflags-y += --wrap=devm_cxl_add_rch_dport
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ldflags-y += --wrap=cxl_rcd_component_reg_phys
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ldflags-y += --wrap=cxl_endpoint_parse_cdat
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ldflags-y += --wrap=cxl_dport_init_ras_reporting
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DRIVERS := ../../../drivers
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CXL_SRC := $(DRIVERS)/cxl
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CXL_CORE_SRC := $(DRIVERS)/cxl/core
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ccflags-y := -I$(srctree)/drivers/cxl/
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ccflags-y += -D__mock=__weak
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ccflags-y += -DTRACE_INCLUDE_PATH=$(CXL_CORE_SRC) -I$(srctree)/drivers/cxl/core/
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obj-m += cxl_acpi.o
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cxl_acpi-y := $(CXL_SRC)/acpi.o
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cxl_acpi-y += mock_acpi.o
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cxl_acpi-y += config_check.o
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cxl_acpi-y += cxl_acpi_test.o
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obj-m += cxl_pmem.o
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cxl_pmem-y := $(CXL_SRC)/pmem.o
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cxl_pmem-y += $(CXL_SRC)/security.o
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cxl_pmem-y += config_check.o
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cxl_pmem-y += cxl_pmem_test.o
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obj-m += cxl_port.o
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cxl_port-y := $(CXL_SRC)/port.o
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cxl_port-y += config_check.o
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cxl_port-y += cxl_port_test.o
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obj-m += cxl_mem.o
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cxl_mem-y := $(CXL_SRC)/mem.o
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cxl_mem-y += config_check.o
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cxl_mem-y += cxl_mem_test.o
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obj-m += cxl_core.o
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cxl_core-y := $(CXL_CORE_SRC)/port.o
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cxl_core-y += $(CXL_CORE_SRC)/pmem.o
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cxl_core-y += $(CXL_CORE_SRC)/regs.o
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cxl_core-y += $(CXL_CORE_SRC)/memdev.o
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cxl_core-y += $(CXL_CORE_SRC)/mbox.o
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cxl_core-y += $(CXL_CORE_SRC)/pci.o
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cxl_core-y += $(CXL_CORE_SRC)/hdm.o
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cxl_core-y += $(CXL_CORE_SRC)/pmu.o
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cxl_core-y += $(CXL_CORE_SRC)/cdat.o
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cxl_core-y += $(CXL_CORE_SRC)/ras.o
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cxl_core-y += $(CXL_CORE_SRC)/acpi.o
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cxl_core-$(CONFIG_TRACING) += $(CXL_CORE_SRC)/trace.o
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cxl_core-$(CONFIG_CXL_REGION) += $(CXL_CORE_SRC)/region.o
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cxl_core-$(CONFIG_CXL_MCE) += $(CXL_CORE_SRC)/mce.o
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cxl_core-$(CONFIG_CXL_FEATURES) += $(CXL_CORE_SRC)/features.o
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cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += $(CXL_CORE_SRC)/edac.o
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cxl_core-y += config_check.o
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cxl_core-y += cxl_core_test.o
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cxl_core-y += cxl_core_exports.o
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KBUILD_CFLAGS := $(filter-out -Wmissing-prototypes -Wmissing-declarations, $(KBUILD_CFLAGS))
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obj-m += test/
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