Files
linux/drivers
Thierry Reding 4ccc402ece clk: tegra: Fix enabling of PLLE
When enabling the PLLE as its final step, clk_plle_enable() would
accidentally OR in the value previously written to the PLLE_SS_CTRL
register.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-17 14:12:46 +03:00
..
2014-04-08 21:34:51 +02:00
2014-04-17 14:12:46 +03:00
2014-04-08 13:28:02 +02:00
2014-04-08 13:27:40 +02:00
2014-04-08 13:27:40 +02:00
2014-04-08 12:41:13 -04:00