Zhenyu Wang 4bfe6b6876 drm/i915: Fix and cleanup DPLL calculation for Ironlake ...

When the ideal error range can't be reached, this will safely use
a most closed one. Clean up some dumb codes in DPLL function too.

This fixes DPLL clock issue against one monitor at 1680x1050@60hz.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

2009-11-05 14:00:32 -08:00

..

drm

drm/i915: Fix and cleanup DPLL calculation for Ironlake

2009-11-05 14:00:32 -08:00

vga

PCI/vgaarb: cleanup some warnings + cleanup some comments.

2009-09-09 13:29:41 -07:00

Makefile

PCI/GPU: implement VGA arbitration on Linux

2009-09-09 13:29:36 -07:00