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Describe 1..4 DSI lanes as supported. Internally, this bridge is an ChipOne ICN6211 which loads its register configuration from a dedicated storage and its I2C does not seem to be accessible. The ICN6211 supports up to 4 DSI lanes, so this is a hard limit for this bridge. The lane configuration is preconfigured in the bridge for each of the WaveShare panels. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260115024004.660986-1-marek.vasut+renesas@mailbox.org Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>