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15fe76e236
When the iommu is used the linearization of the mapping can give a single
block that is very large split across multiple SG entries.
When __rdma_block_iter_next() reassembles the split SG entries it is
overflowing the 32 bit stack values and computed the wrong DMA addresses
for blocks after the truncation.
Use the right types to hold DMA addresses.
Link: https://patch.msgid.link/r/1-v1-88303e9e509f+f7-ib_umem_types_jgg@nvidia.com
Cc: stable@vger.kernel.org
Fixes: a808273a49 ("RDMA/verbs: Add a DMA iterator to return aligned contiguous memory blocks")
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
44 lines
1.2 KiB
C
44 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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/* Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. */
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#include <linux/export.h>
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#include <rdma/iter.h>
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void __rdma_block_iter_start(struct ib_block_iter *biter,
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struct scatterlist *sglist, unsigned int nents,
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unsigned long pgsz)
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{
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memset(biter, 0, sizeof(struct ib_block_iter));
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biter->__sg = sglist;
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biter->__sg_nents = nents;
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/* Driver provides best block size to use */
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biter->__pg_bit = __fls(pgsz);
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}
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EXPORT_SYMBOL(__rdma_block_iter_start);
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bool __rdma_block_iter_next(struct ib_block_iter *biter)
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{
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dma_addr_t block_offset;
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dma_addr_t delta;
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if (!biter->__sg_nents || !biter->__sg)
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return false;
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biter->__dma_addr = sg_dma_address(biter->__sg) + biter->__sg_advance;
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block_offset = biter->__dma_addr & (BIT_ULL(biter->__pg_bit) - 1);
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delta = BIT_ULL(biter->__pg_bit) - block_offset;
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while (biter->__sg_nents && biter->__sg &&
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sg_dma_len(biter->__sg) - biter->__sg_advance <= delta) {
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delta -= sg_dma_len(biter->__sg) - biter->__sg_advance;
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biter->__sg_advance = 0;
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biter->__sg = sg_next(biter->__sg);
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biter->__sg_nents--;
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}
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biter->__sg_advance += delta;
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return true;
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}
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EXPORT_SYMBOL(__rdma_block_iter_next);
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