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9249bcdea0
The boot_{rdmsr,wrmsr}() helpers are *just* the barebones MSR access
functionality, without any tracing or exception handling glue as it is done in
kernel proper.
Move these helpers to asm/shared/msr.h and rename to raw_{rdmsr,wrmsr}() to
indicate what they are.
[ bp: Correct the reason why those helpers exist. I should've caught that in
the original patch that added them:
176db62257 ("x86/boot: Introduce helpers for MSR reads/writes"
but oh well...
- fixup include path delimiters to <> ]
Signed-off-by: John Allen <john.allen@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://patch.msgid.link/all/20250924200852.4452-2-john.allen@amd.com
45 lines
848 B
C
45 lines
848 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AMD SEV header for early boot related functions.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*/
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#ifndef BOOT_COMPRESSED_SEV_H
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#define BOOT_COMPRESSED_SEV_H
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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#include <asm/shared/msr.h>
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void snp_accept_memory(phys_addr_t start, phys_addr_t end);
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u64 sev_get_status(void);
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bool early_is_sevsnp_guest(void);
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static inline u64 sev_es_rd_ghcb_msr(void)
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{
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struct msr m;
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raw_rdmsr(MSR_AMD64_SEV_ES_GHCB, &m);
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return m.q;
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}
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static inline void sev_es_wr_ghcb_msr(u64 val)
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{
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struct msr m;
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m.q = val;
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raw_wrmsr(MSR_AMD64_SEV_ES_GHCB, &m);
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}
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#else
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static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) { }
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static inline u64 sev_get_status(void) { return 0; }
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static inline bool early_is_sevsnp_guest(void) { return false; }
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#endif
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#endif
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