A memory clock value (MCLK) is changed to a minimum required by a current
mode bandwidth. This usually lowers the MCLK to its minimum (50 MHz) thus
decreasing the card performance. Just leave the MCLK value set by card
BIOS.
The CL-GD5446 Technical Reference Manual point 9.9.1.3 states that if a
pixclock value is close (~1%) to the MCLK or MCLK/2 this may result in a
jitter on the screen. A countermeasure is to use the MCLK as pixclock
source instead of a VCLK. The patch implements this as well.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
486ff387c0