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Due to initial design of the Xe debugfs, the GGTT and LMEM files were defined on the primary GT, instead of being per-tile. While PF provisioning code is now still maintaining GGTT and LMEM also on the per primary-GT level, this will be refactored soon, but we can fix debugfs layout now, as part of the new SR-IOV tree. For backward compatibility we will provide some symlinks that can be removed once our tools will be fully converted. As we are making all those changes in the user facing interface, take this as apportunity to also start replacing the "LMEM" term, used by the SR-IOV code, with the "VRAM" term, used by Xe driver. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250928140029.198847-7-michal.wajdeczko@intel.com