Files
linux/drivers/clk
Samuel Holland 47d64fef1f clk: sunxi-ng: sun8i-r: Fix divider on APB0 clock
According to the BSP source code, the APB0 clock on the H3 and H5 has a
normal M divider, not a power-of-two divider. This matches the hardware
in the A83T (as described in both the BSP source code and the manual).
Since the A83T and H3/A64 clocks are actually the same, we can merge the
definitions.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-02 10:27:47 +01:00
..
2019-10-17 16:36:11 +02:00
2019-10-03 10:51:11 -07:00
2018-12-11 09:57:47 -08:00
2018-07-06 13:44:06 -07:00