Ankit Nautiyal 46bc23dcd9 drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHz ...

Add snps phy table values for HDMI pixel clocks 267.30 MHz and
319.89 MHz. Values are based on the Bspec algorithm for
PLL programming for HDMI.

Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8008
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230223043619.3941382-1-ankit.k.nautiyal@intel.com
(cherry picked from commit d46746b8b1)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

2023-03-13 11:38:05 +02:00

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drm

drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHz

2023-03-13 11:38:05 +02:00

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