Antoniu Miclaus 4028cbcf34 iio: adc: ad4080: add support for AD4083 ...

Add support for AD4083 16-bit SAR ADC. The AD4083 differs from
AD4080 in resolution (16-bit vs 20-bit) and LVDS CNV clock count
maximum (5 vs 7).

Changes:
- Add AD4083_CHIP_ID definition (0x0053)
- Create ad4083_channel with 16-bit resolution and storage
- Add ad4083_chip_info with lvds_cnv_clk_cnt_max = 5
- Register AD4083 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

2025-11-09 12:57:03 +00:00

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accel

accel/habanalabs: add Infineon version check

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Revert "i2c: boardinfo: Annotate code used in init phase only"

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i3c

i3c: fix big-endian FIFO transfers

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iio

iio: adc: ad4080: add support for AD4083

2025-11-09 12:57:03 +00:00

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NTB: epf: Add Renesas rcar support

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