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Luigi reported that retriggering a posted MSI interrupt does not work
correctly.
The reason is that the retrigger happens at the vector domain by sending an
IPI to the actual vector on the target CPU. That works correctly exactly
once because the posted MSI interrupt chip does not issue an EOI as that's
only required for the posted MSI notification vector itself.
As a consequence the vector becomes stale in the ISR, which not only
affects this vector but also any lower priority vector in the affected
APIC because the ISR bit is not cleared.
Luigi proposed to set the vector in the remap PIR bitmap and raise the
posted MSI notification vector. That works, but that still does not cure a
related problem:
If there is ever a stray interrupt on such a vector, then the related
APIC ISR bit becomes stale due to the lack of EOI as described above.
Unlikely to happen, but if it happens it's not debuggable at all.
So instead of playing games with the PIR, this can be actually solved
for both cases by:
1) Keeping track of the posted interrupt vector handler state
2) Implementing a posted MSI specific irq_ack() callback which checks that
state. If the posted vector handler is inactive it issues an EOI,
otherwise it delegates that to the posted handler.
This is correct versus affinity changes and concurrent events on the posted
vector as the actual handler invocation is serialized through the interrupt
descriptor lock.
Fixes: ed1e48ea43 ("iommu/vt-d: Enable posted mode for device MSIs")
Reported-by: Luigi Rizzo <lrizzo@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Luigi Rizzo <lrizzo@google.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20251125214631.044440658@linutronix.de
Closes: https://lore.kernel.org/lkml/20251124104836.3685533-1-lrizzo@google.com
98 lines
2.5 KiB
C
98 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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*
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* This header file contains the interface of the interrupt remapping code to
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* the x86 interrupt management code.
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*/
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#ifndef __X86_IRQ_REMAPPING_H
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#define __X86_IRQ_REMAPPING_H
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#include <asm/irqdomain.h>
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#include <asm/hw_irq.h>
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#include <asm/io_apic.h>
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struct msi_msg;
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struct irq_alloc_info;
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enum irq_remap_cap {
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IRQ_POSTING_CAP = 0,
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};
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enum {
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IRQ_REMAP_XAPIC_MODE,
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IRQ_REMAP_X2APIC_MODE,
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};
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/*
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* This is mainly used to communicate information back-and-forth
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* between SVM and IOMMU for setting up and tearing down posted
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* interrupt
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*/
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struct amd_iommu_pi_data {
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u64 vapic_addr; /* Physical address of the vCPU's vAPIC. */
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u32 ga_tag;
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u32 vector; /* Guest vector of the interrupt */
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int cpu;
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bool ga_log_intr;
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bool is_guest_mode;
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void *ir_data;
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};
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struct intel_iommu_pi_data {
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u64 pi_desc_addr; /* Physical address of PI Descriptor */
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u32 vector; /* Guest vector of the interrupt */
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};
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#ifdef CONFIG_IRQ_REMAP
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extern raw_spinlock_t irq_2_ir_lock;
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extern bool irq_remapping_cap(enum irq_remap_cap cap);
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extern void set_irq_remapping_broken(void);
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extern int irq_remapping_prepare(void);
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extern int irq_remapping_enable(void);
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extern void irq_remapping_disable(void);
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extern int irq_remapping_reenable(int);
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extern int irq_remap_enable_fault_handling(void);
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extern void panic_if_irq_remap(const char *msg);
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/* Get parent irqdomain for interrupt remapping irqdomain */
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static inline struct irq_domain *arch_get_ir_parent_domain(void)
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{
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return x86_vector_domain;
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}
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extern bool enable_posted_msi;
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static inline bool posted_msi_supported(void)
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{
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return enable_posted_msi && irq_remapping_cap(IRQ_POSTING_CAP);
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}
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#else /* CONFIG_IRQ_REMAP */
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static inline bool irq_remapping_cap(enum irq_remap_cap cap) { return 0; }
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static inline void set_irq_remapping_broken(void) { }
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static inline int irq_remapping_prepare(void) { return -ENODEV; }
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static inline int irq_remapping_enable(void) { return -ENODEV; }
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static inline void irq_remapping_disable(void) { }
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static inline int irq_remapping_reenable(int eim) { return -ENODEV; }
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static inline int irq_remap_enable_fault_handling(void) { return -ENODEV; }
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static inline void panic_if_irq_remap(const char *msg)
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{
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}
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#endif /* CONFIG_IRQ_REMAP */
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#ifdef CONFIG_X86_POSTED_MSI
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void intel_ack_posted_msi_irq(struct irq_data *irqd);
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#else
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#define intel_ack_posted_msi_irq NULL
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#endif
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#endif /* __X86_IRQ_REMAPPING_H */
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